Packaging and testing house Powertech Technology (PTI) plans to lower the proportion of standard DRAM products in company revenues to less than 70% in the first quarter of 2012, and further down to 60% later in the year, according to company chairman DK Tsai.
Falling demand for PC DRAM chips, also partly as a result of production cutbacks at major clients, impacted PTI's business operations during the second and third quarters, Tsai indicated. Therefore, shifting its focus to other memory products and logic ICs is now a must, Tsai said.
Unlike demand coming from the PC sector, demand for mobile DRAM packaging and testing actually remains strong, Tsai pointed out. Sales generated from the segment are expected to grow while those from the PC DRAM segment will decrease, Tsai added.
As for NAND flash, Tsai believes that smartphones and tablet PCs will buoy the demand outlook. PTI has also seen rising testing orders for chips used in solid-state drives (SSD), Tsai said.
PTI has secured orders for NAND chips from more than one major company, Tsai revealed.
PTI has guided its fourth-quarter sales will see flat or slight growth sequentially. Sales for the first quarter of 2012 are likely to remain flat on quarter, or decrease slightly affected by fewer working days, according to Tsai.
PTI reported NT$9.71 billion (US$323 million) in consolidated revenues for the third quarter of 2011, down 5.4% sequentially. Gross margin for the quarter slid to 22.3% from 24.6% in the second quarter. The firm generated NT$1.52 billion in net profits, down 18.7% from profits of NT$1.86 billion in the prior quarter.
DRAM products accounted for 73% of PTI's overall sales in the third quarter of 2011, followed by flash products with 25% and logic ICs with 2%.
In addition, PTI's capex for 2012 may be lower than that allocated in 2011, Tsai indicated. The company's planned capex budget for 2011 of NT$12 billion remains unchanged, according to Tsai.
Tsai also added that over the next few years, PTI will step up the development of high-end packaging technologies, such as wafer-level CSP, copper pillar bumping, SiP, TSV and Si interposer packaging.